Logik

Usage

  • System Software Requirements
  • Installing Required Software
  • Design Preparation
  • Preparing the Silicon Compiler Run Script
  • RTL-to-Bitstream Flow Execution

References

  • Preparing Timing Constraints for VPR
  • Preparing Pin Constraints and Placement Constraints
  • Bitstream Formatting
  • External Links for Open Source Tools
Logik
  • External Links for Open Source Tools
  • View page source

External Links for Open Source Tools

Below is a set of links to documentation for open source tools used by Logik. For each tool, the “Github” to go to the project github page. The “Documentation” link links to the project’s online documentation/home page. If a tool does not contain a documentation link below, please consult its Github repository README for documentation.

F4PGA (FASM format authors)

F4PGA Github

F4PGA Documentation

GHDL

GHDL Github

GHDL Documentation

GTKWave

Gtkwave Github

Gtkwave Documentation

Icarus Verilog

Icarus Github

Icarus Documentation

Silicon Compiler

SC Github

SC Documentation

Surelog

Surelog Github

sv2v

sv2v Github

Verilator

Verilator Github

Verilator Documentation

Verilog-to-Routing (VPR)

VPR Github

VPR Documentation

Wildebeest

Wildebeest Github

Yosys

Yosys Github

Yosys Documentation

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