Logik Demo Edition

Welcome to the demo edition of Logik. In this edition, the following features are showcased:

• RTL to bitstream automation flow for FPGA/eFPGA architectures, powered by Silicon Compiler

• logik_demo Example eFPGA Architecture Model with the following resources:

  4-input LUTs	6576
  Registers	6576
  GPIOs	64
  UMI Interfaces	3
  4KB Block RAMs	16
  Multiply-Add Engines (MAEs)	16

• Example designs for reference in adopting the flow

• Documentation providing step-by-step guidance for setup and execution of the flow

Documentation Table of Contents

Usage

• System Software Requirements
  • Supported Operating Systems
  • General Purpose Software Requirements
  • Required EDA Software Tools
  • Optional EDA Software Tools
• Installing Required Software
  • Silicon Compiler Tools Docker Image Setup
  • Building Software From Source
• Design Preparation
  • Create a Working Directory
  • Aggregate Input Files
• Preparing the Silicon Compiler Run Script
  • Import Modules
  • Create Main Function
  • Create Chip Object
  • Select Part Name
  • Register Packages (if needed)
  • Set Input Source Files
  • Set Timing Constraints
  • Set Pin Constraints
  • Add Options
  • Configure Remote Execution (optional)
  • Add Execution Calls
• RTL-to-Bitstream Flow Execution

References

• Preparing Timing Constraints for VPR
• Preparing Pin Constraints and Placement Constraints
• Automating Pin Constraint Generation for UMI Ports
• Bitstream Formatting
• logik_demo Example eFPGA Architecture Model
• External Links for Open Source Tools

Indices and tables

• Index

• Module Index

• Search Page